Our thematic session on the Computing System Week (CSW)
This thematic session aims are bringing together researchers and practitioners in the area of HPC and in particular Exascale Computing with the goal to exchange ideas and discuss approaches that will enable tackling the various challenges Exascale computing systems raise. In particular, we will focus on programming models and tools towards high performance and energy efficiency on these systems. Other topics, will also include migration of existing applications, resilience, and runtime adaptivity.
The 2016 Spring edition of the Computing System Week (CSW) will be held at Science and Technology Park of University of Porto. Our team will represent a thematic session on this event. here you can found detailed information about it:
Title: Programming Models and Tools towards Energy-efficient Exascale Computing Systems
Date: 20 of April 2016 (9:00 AM to 12:00 noon)
Prof. João M. P. Cardoso (Universidade do Porto, Portugal - https://paginas.fe.up.pt/~jmpc/)
Dr. Pedro C. Diniz (INESC-TEC, Portugal and Univ. of Southern California, USA – www.isi.edu/~pedro)
Prof. Thomas Fahringer (University of Innsbruck, Austria - http://www.dps.uibk.ac.at/~tf/)
Motivation and Objectives: This thematic session aims are bringing together researchers and practitioners in the area of HPC and in particular Exascale Computing with the goal to exchange ideas and discuss approaches that will enable tackling the various challenges Exascale computing systems raise. In particular, we will focus on programming models and tools towards high performance and energy efficiency on these systems. Other topics, will also include migration of existing applications, resilience, and runtime adaptivity.
Participants: We have confirmed participation from the lead PIs of six EU-funded research projects, as listed below. In addition, we expect the participation of researchers and managers of leading European HPC centers such as BSC (Spain), Jülich (Germany) and Cineca (Italy).
Anticipated Programme: (3 hours)
Introduction (5 mins)
Presenter: Pedro C. Diniz
Technical Project Presentations (3 x 25 mins) – See the following pages for details schedule with tentative titles abstracts, and short bios of the presenters.
EPiGRAM: EPiGRAM - Exascale ProGRAmming Models (http://www.epigram-project.eu), Presenter: Erwin Laure (confirmed)
ALLScale: An Exascale Programming, Multi-objective Optimisation and Resilience Management Environment Based on Nested Recursive Parallelism, (www.allscale.eu/), Presenter: Thomas Fahringer (confirmed)
ANTAREX: AutoTuning and Adaptivity appRoach for Energy efficient eXascale HPC systems (http://www.antarex-project.eu/), Presenter: Cristina Silvano (confirmed)
Coffee Break: 10:00 to 10:30 (30 mins)
Technical Project Presentations (3 x 25 mins) – See the following pages for details schedule with tentative titles abstracts, and short bios of the presenters.
EXTRA: Exploiting eXascale Technology with Reconfigurable Architectures, (www.extrahpc.eu), Presenter: Dirk Stroobandt (confirmed)
Title to be determined, Presenter: Miquel Moreto Panas (confirmed)
READEX: Run-Time Exploitation of Application Dynamism for Energy Efficient Exascale Computing. Presenter: David Horák (confirmed)
Closing Remarks (5 mins)
Presenter: João M. P. Cardoso
Technical Project Presentations
Title: Message Passing + PGAS for Exascale
Abstract: EPiGRAM is an EC funded project with the aim to push the Message Passing and PGAS programming models towards Exascale. EPiGRAM has three main objectives. First, we investigate novel concepts and algorithms in Message Passing and PGAS programming models, providing prototype implementations in MPI and GPI-2 (a PGAS library developed by Fraunhofer Society). We focus on the development and implementation of persistent and neighborhood collectives in MPI and on fast remote memory access in GPI-2. Second, we combine the Message-Passing and PGAS programming models for enhanced interoperability and scalability. MPI end-points and GPI-2 isolation of library are studied in EPiGRAM. A PGAS-based MPI1.0 implementation, called “EMPI4RE” (EPiGRAM MPI for Research), is our first attempt to combine Message Passing and PGAS.Third, we follow closely and support the standardization process of the MPI and GASPI programming models. In particular, the work on proposals for MPI end-points and persistent collectives is lead by an EPiGRAM member. EPiGRAM was one of the main drivers of the GASPI standardization effort and of the establishment of a GASPI forum. In this talk, we discuss the progress made during the the EPiGRAM project and the impact this work will have for the quest towards Exascale.
Presenter: Prof. Dr. Erwin Laure
Short Bio: Prof. Erwin Laure is Director of the PDC - Center for High Performance Computing Center and head of the Department of Computational Science and Technology at KTH, Stockholm. He is the Coordinator of the EC-funded "EPiGRAM", "ExaFLOW", and "BioExcel" projects and actively involved in major e-infrastructure projects (EGI, PRACE, EUDAT) as well as exascale computing projects. His research interests include programming environments, languages, compilers and runtime systems for parallel and distributed computing, with a focus on exascale computing.
Title: AllScale: An Exascale Programming, Multi-Objective Optimisation and Resilience Management Environment Based on Nested Recursive Parallelism
Abstract: The potential of existing programming models to effectively utilise future Exascale systems, while addressing the challenges of energy-efficiency, diminishing resilience and hardware diversity, is severely limited. It follows that the lack of appropriate, high-productivity and portable programming models for Exascale computing is a fundamental barrier for the future of science and engineering. We propose the AllScale environment for the effective development of highly scalable, resilient and performance-portable parallel applications for Exascale systems. AllScale (www.allscale.eu) which is an EC funded H2020 project comprises a core set of objectives; Single-source-to-anyscale application development; Exploit the potential of nested recursive parallelism for HPC; Multi-objective optimization for execution time, energy and resource usage; Unified runtime system; Mitigating an increased risk of HW failures; Scalable online analysis of non-functional behavior. In this talk we present and motivate the goals of AllScale, outline the current AllScale architecture and discuss the AllScale API.
Presenter: Prof. Dr. Thomas Fahringer (firstname.lastname@example.org)
Short Bio: Thomas Fahringer is a Professor of Computer Science at the University of Innsbruck in Austria. He is leading a research group in the area of distributed and parallel processing which develops the ASKALON programming environment to support researchers worldwide in various fields of science and engineering to develop, analyse, optimize and run distributed applications for Cloud systems. Furthermore, he leads a research team that created the Insieme parallelizing and optimizing compiler for heterogeneous multicore parallel computers ranging from mobile systems to high end supercomputers. Before joining the University of Innsbruck, Fahringer worked as an assistant and associate professor at the University of Vienna in Austria where his research focused on compiler technology and tools for high performance applications. Fahringer is a graduate of the Technical University of Vienna with a doctorate in computer science. Fahringer was involved in numerous national and international research projects including 12 EU funded projects, three of them were coordinated by him. Fahringer has published 5 books, 35 journal and magazine articles and more than 200 reviewed conference papers including 4 best/distinguished IEEE/ACM/Springer papers.
Abstract: The main goal of the ANTAREX project is to express by a Domain Specific Language (DSL) the application self-adaptivity and to runtime manage and autotune applications for green and heterogeneous High Performance Computing (HPC) systems up to the Exascale level. Key innovations of the project include the introduction of a separation of concerns between self-adaptivity strategies and application functionalities. The DSL approach will allow the definition of energy-efficiency, performance, and adaptivity strategies as well as their enforcement at runtime through application autotuning and resource and power management.
Presenter: Prof. Dr. Cristina Silvano (email@example.com)
Short Bio: Cristina Silvano is an Associate Professor (with tenure) of Computer Engineering at the Politecnico di Milano. She received her MS degree (Laurea) in Electrical Engineering from Politecnico di Milano in 1987. From 1987 to 1996, she was Senior Design Engineer at the R&D Labs of Group Bull in Pregnana Milanese (Italy) and Visiting Engineer at Bull R&D Labs in Billerica (US) (1988-89) and at IBM Somerset Design Center, Austin (US) (1993-1994). She received her Ph.D. in Computer Engineering from the University of Brescia in 1999. She was Assistant Professor of Computer Science at the University of Milano (2000 -2002) and then Associate Professor at the Politecnico di Milano (2002-present). Her primary research interests focus on computer architectures and electronic design automation, with particular emphasis on power-aware design for embedded systems, design space exploration and runtime resource management for many-core architectures. She has published more than 140 papers in premier international journals and conferences. Her research has been funded by several national and international projects. She is currently Project Coordinator for the H2020-FET-HPC ANTAREX European project on autotuning and adaptivity for energy-efficient exascale High Performance Computing systems.
Title: EXTRA: Exploiting eXascale Technology with Reconfigurable Architectures
Presenter: Prof. Dr. Dirk Stroobandt
Short bio: Dirk Stroobandt obtained the Ph.D. degree in electrotechnical engineering in 1998 from Ghent University. He is currently Full Professor at Ghent University and leads the research group HES (Hardware and Embedded Systems) with interests in semi-automatic hardware design methodologies and tools, run-time FPGA reconfiguration, and reconfigurable multiprocessor networks. He coordinates the EU-H2020-project EXTRA: Exploiting eXascale Technology with Reconfigurable Architectures. Dirk Stroobandt is the inaugural winner of the ACM/SIGDA Outstanding Doctoral Thesis Award in Design Automation (1999) and also received the `Scientific prize Alcatel Bell' in 2002. His group won several best paper awards and his master students several master thesis prizes. Dirk Stroobandt has been and is editor of several journals and is involved in the organisation of several conferences. He is reviewer for numerous conferences and journals. Since 2014, Dirk Stroobandt is chair of the educational committee for the electrical engineering courses at Ghent University. He is also the representative of Ghent University in DSP Valley and member of the Board of DSP Valley.
Abstract: To handle the stringent performance requirements of future exascale-class applications, High Performance Computing (HPC) systems need ultra-efficient heterogeneous compute nodes. To reduce power and increase performance, such compute nodes will require hardware accelerators with a high degree of specialization. Ideally, dynamic reconfiguration will be an intrinsic feature, so that specific HPC application features can be optimally accelerated, even if they regularly change over time. In the EXTRA project, we create a new and flexible exploration platform for developing reconfigurable architectures, design tools and HPC applications with run-time reconfiguration built-in as a core fundamental feature instead of an add-on. EXTRA covers the entire stack from architecture up to the application, focusing on the fundamental building blocks for run-time reconfigurable exascale HPC systems: new chip architectures with very low reconfiguration overhead, new tools that truly take reconfiguration as a central design concept, and applications that are tuned to maximally benefit from the proposed run-time reconfiguration techniques. Ultimately, this open platform will improve Europe's competitive advantage and leadership in the field.
Title: RoMoL: Riding on Moore's Law
Presenter: Miquel Moretó Panas (firstname.lastname@example.org)
Abstract: In the last few years, the traditional ways to keep the increase of hardware performance to the rate predicted by the Moore's Law have vanished. When uni-cores were the norm, hardware design was decoupled from the software stack thanks to a well defined Instruction Set Architecture (ISA). This simple interface allowed developing applications without worrying too much about the underlying hardware, while hardware designers were able to aggressively exploit instruction-level parallelism (ILP) in superscalar processors. Current multi-cores are designed as simple symmetric multiprocessors (SMP) on a chip. However, we believe that this is not enough to overcome all the problems that multi-cores face. The runtime has to drive the design of future multi-cores to overcome the restrictions in terms of power, memory, programmability and resilience that multi-cores have. In this talk, we introduce a first approach towards a Runtime-Aware Architecture (RAA), a massively parallel architecture designed from the runtime's perspective that we are developing in the RoMoL project.
Short bio: Miquel Moreto is a senior researcher at the Barcelona Supercomputing Center (BSC) and an adjunct lecturer at UPC, Spain. He received the BSc and MSc degrees in mathematics and electrical engineering from UPC, and the PhD degree in 2010 in the Computer Architecture Department at the same university. He spent 15 months as a Fulbright postdoctoral fellow at the International Computer Science Institute (ICSI), Berkeley, USA. His research interests include studying shared resources in multithreaded architectures and hardware-software co-design for future massively parallel systems. In 2013, he joined the BSC to work on the ERC-funded project RoMoL.
Title: READEX: Run-Time Exploitation of Application Dynamism for Energy Efficient Exascale Computing.
Presenter: Prof. Dr. David Horák (email@example.com)
Abstract: The energy consumption of supercomputers is one of the critical problems for the upcoming Exascale supercomputing era. The main goal of the participating institutions in the READEX project is to develop an auto-tuning tool which makes the computations and simulations more energy efficient employing new scenarios and techniques changing software, hardware and application parameters such as the frequency of computational cores. The task of IT4Innovations consists in the evaluation of dynamism in HPC applications, manual tuning of FETI solvers, in particular, based on domain decomposition combining direct and iterative methods, and evaluation and validation of the developed tool taking the results of manual tuning as the baseline. The presentation deals with the energy consumption evaluation of FETI solver and sparse and dense BLAS routines depending on the CPU frequency, compiler's type, compiler's parameters and MPI using a linear elasticity 3D cube synthetic benchmark.
Short bio: David Horák: (Mr.) has MSc.and PhD. degrees in Computer Science and Applied Mathematics at VSB–Technical University of Ostrava, Czech Republic (2007 Babuška price for PhD. thesis in Computer Sciences), since 2003 until now Lecturer at Department of Applied Mathematics and since 2012 until now Researcher at IT4Innovations supercomputing centre, both at VSB–TUO. His professional interest covers development and implementation of the scalable linear and nonlinear problems solvers using domain decomposition methods of FETI type, integral-discrete transforms. He is co-author of FLLOP and PERMON libraries for the massively parallel solution of quadratic programming problems. Research stays: EPCC Edinburgh, Johannes Kepler Universitat Linz, University of Colorado – Dep.of Aerospace Engineering in Boulder, Stanford University in California, CSC Helsinki. Publication activities: author and co-author of 90 papers published in internal and foreign proceedings of scientific conferences and journals, author and co-author of 18 impact papers (Web Of Science), Sum of the Times Cited: 191, Sum of Times Cited without self-citations: 154, h-index: 7. He participated in PRACE and EXA2CT projects.